veryl-lang/veryl - CodSpeed

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Performance History

Latest Results

Merge pull request #2910 from veryl-lang/fix/sim-jit-wide-shift fix(simulator): clamp wide (>64-bit) shift counts in cranelift and aot_c backends

master

2 hours ago

fix(simulator): clamp wide (>64-bit) shift counts in cranelift and aot_c backends

fix/sim-jit-wide-shift

2 hours ago

Merge pull request #2909 from veryl-lang/fix/int-to-float-sign fix(analyzer): sign-extend narrow signed values before int-to-float cast

master

2 hours ago

fix(analyzer): sign-extend narrow signed values before int-to-float cast

fix/int-to-float-sign

3 hours ago

Merge pull request #2908 from veryl-lang/fix/cdc-signed-launder fix(analyzer): keep clock domain through $signed/$unsigned so CDC crossings are detected

master

3 hours ago

fix(analyzer): keep clock domain through $signed/$unsigned so CDC crossings are detected

fix/cdc-signed-launder

4 hours ago

Merge pull request #2907 from veryl-lang/fix/sim-interp-wide-shift fix(analyzer): clamp wide (>64-bit) shift amounts instead of evaluating them as x

master

4 hours ago

fix(analyzer): clamp wide (>64-bit) shift amounts instead of evaluating them as x

fix/sim-interp-wide-shift

5 hours ago

Latest Branches

0%

fix(simulator): clamp wide (>64-bit) shift counts in cranelift and aot_c backends#2910

22 hours ago

cb267f5

fix/sim-jit-wide-shift

0%

fix(analyzer): sign-extend narrow signed values before int-to-float cast#2909

22 hours ago

e113826

fix/int-to-float-sign

0%

fix(analyzer): keep clock domain through $signed/$unsigned so CDC crossings are detected#2908

23 hours ago

e8ba71b

fix/cdc-signed-launder

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