Latest Results
Run the ISA legs on metal, and trim the leg set to avx2, avx512 and neon
Simulation stays the default: only a benchmark that names an instruction set leaves the
sharded job, so this costs nothing for benchmarks with no reason to care.
Drops the two legs that had no benchmark and no verified runner. `sse2` was an x86-64
baseline whose flag is a no-op on the target, so its benchmark goes back to being local
only, where it was before. `sve` had neither a kernel in the tree nor a machine known to
implement it. `any` becomes `all`.
Each remaining leg runs on bare metal, like the other walltime benchmark jobs, rather than
through a hypervisor:
avx2 c7i.metal-24xl Sapphire Rapids, smaller of the two c7i metal sizes
avx512 c7i.metal-24xl same family, so only the build flags differ between the two
neon c7g.metal Graviton3, cheapest current-generation Arm metal
Graviton2 (c6g.metal) is cheaper still, but predates SVE and so could not host an SVE leg
later. Sharing a family between avx2 and avx512 keeps the comparison between them honest:
the silicon is identical and only `-C target-feature` differs.
Signed-off-by: "Joe Isaacs" <joe.isaacs@live.co.uk>claude/codspeed-benchmarks-arch-ux-ci-273g7s Latest Branches
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