ChrisDryden:timeout-signal-0-display - Branch - uutils/coreutils - CodSpeed

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timeout: display signal 0 as '0' instead of 'EXIT' in verbose mode

#10194Merged

Comparing

ChrisDryden:timeout-signal-0-display

(

74e498a

) with

main

(

0d403a4

)

+4%

Untouched: 140

Ignored: 1

Skipped: 38

Benchmarks

179 total

dd_copy_partial

src/uu/dd/benches/dd_bench.rs

-1%

564.4 µs572.5 µs

du_deep_tree[(100, 3)]

src/uu/du/benches/du_bench.rs

+1%

1.2 ms1.2 ms

du_max_depth_balanced_tree[(6, 4, 10)]

src/uu/du/benches/du_bench.rs

-1%

32.9 ms33.2 ms

dd_copy_4k_blocks

src/uu/dd/benches/dd_bench.rs

-1%

1.3 ms1.4 ms

cksum_crc

src/uu/cksum/benches/cksum_bench.rs

0%

16.7 ms16.8 ms

sort_reverse_locale[500000]

src/uu/sort/benches/sort_bench.rs

0%

350.9 ms352.4 ms

dd_copy_default

src/uu/dd/benches/dd_bench.rs

0%

13.9 ms14 ms

du_all_wide_tree[(5000, 500)]

src/uu/du/benches/du_bench.rs

0%

18.1 ms18.1 ms

dd_copy_with_skip

src/uu/dd/benches/dd_bench.rs

0%

2.3 ms2.3 ms

dd_copy_8k_blocks

src/uu/dd/benches/dd_bench.rs

0%

1 ms1 ms

cksum_default

src/uu/cksum/benches/cksum_bench.rs

0%

16.8 ms16.8 ms

cksum_raw_output

src/uu/cksum/benches/cksum_bench.rs

0%

16.8 ms16.8 ms

dd_copy_with_seek

src/uu/dd/benches/dd_bench.rs

0%

2.3 ms2.3 ms

mv_multiple_to_dir

src/uu/mv/benches/mv_bench.rs

0%

12.9 ms12.9 ms

dd_copy_separate_blocks

src/uu/dd/benches/dd_bench.rs

0%

44 ms44.1 ms

complex_relative_date

src/uu/date/benches/date_bench.rs

0%

245.6 µs245.7 µs

sort_reverse_utf8_locale

src/uu/sort/benches/sort_locale_utf8_bench.rs

0%

37.6 ms37.6 ms

sort_long_line[160000]

src/uu/sort/benches/sort_bench.rs

0%

1.7 ms1.7 ms

dd_copy_1m_blocks

src/uu/dd/benches/dd_bench.rs

0%

1.5 ms1.5 ms

du_wide_tree[(5000, 500)]

src/uu/du/benches/du_bench.rs

0%

11.3 ms11.3 ms

df_deep_directory

src/uu/df/benches/df_bench.rs

0%

382.5 µs382.3 µs

b64_encode_synthetic

src/uu/base64/benches/base64_bench.rs

0%

168.9 µs169 µs

cp_archive_balanced_tree[(5, 4, 10)]

src/uu/cp/benches/cp_bench.rs

0%

78 ms78 ms

single_date_now

src/uu/date/benches/date_bench.rs

0%

190.6 µs190.7 µs

du_summarize_balanced_tree[(5, 4, 10)]

src/uu/du/benches/du_bench.rs

0%

8.5 ms8.5 ms

Commits

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Base

main

0d403a4

+3.51%

timeout: display signal 0 as '0' instead of 'EXIT' in verbose mode

74e498a

7 months ago

by ChrisDryden

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