ct/safety-docs - Branch - spiraldb/fastlanes

Docs: clear up safety documentation

#102Merged

Comparing

ct/safety-docs

(

fb498f7

) with

develop

(

81e9c70

)

-24%

Improvements: 7

Regressions: 7

Untouched: 22

Skipped: 16

Benchmarks

Skipped (16)

Failed

unfor_pack_16_from_3_stack

benches/ffor.rs

Regression

-15%

2.5 µs3 µs

pack_16_to_3_stack

benches/bitpacking.rs

Regression

-24%

1.7 µs2.2 µs

unchecked_unpack_then_add_reference_16_from_3_stack

benches/ffor.rs

Regression

-12%

3.4 µs3.8 µs

unpack_then_add_reference_16_from_3_stack

benches/ffor.rs

Regression

-12%

3.2 µs3.7 µs

unchecked_unfor_pack_16_from_3_stack

benches/ffor.rs

Regression

-14%

2.7 µs3.2 µs

unchecked_unpack_16_from_3_stack

benches/bitpacking.rs

Regression

-13%

2.6 µs3 µs

unpack_16_from_3_stack

benches/bitpacking.rs

Regression

-13%

2.5 µs2.9 µs

Improved

bitpacking_cmp_seq[u64]

benches/bitpacking_cmp_cod.rs

+34%

7.5 µs5.6 µs

for_pack_16_to_3_stack

benches/ffor.rs

+29%

2.3 µs1.8 µs

bitpacking_cmp_unpack[u64]

benches/bitpacking_cmp_cod.rs

+24%

9.5 µs7.7 µs

bitpacking_cmp_seq[u32]

benches/bitpacking_cmp_cod.rs

+24%

5.2 µs4.2 µs

bitpacking_cmp_unpack[u32]

benches/bitpacking_cmp_cod.rs

+21%

5.2 µs4.3 µs

bitpacking_cmp_unpack[u16]

benches/bitpacking_cmp_cod.rs

+17%

3.1 µs2.6 µs

bitpacking_cmp_seq[u16]

benches/bitpacking_cmp_cod.rs

+10%

5.8 µs5.2 µs

Passed

bitpacking_cmp_fused[u16]

benches/bitpacking_cmp_cod.rs

+3%

2.3 µs2.2 µs

bitpacking_cmp_fused[u32]

benches/bitpacking_cmp_cod.rs

+2%

2.8 µs2.8 µs

for_pack_16_to_3_heap

benches/ffor.rs

+2%

1.9 µs1.9 µs

bitpacking_cmp_fused[u64]

benches/bitpacking_cmp_cod.rs

+1%

4 µs4 µs

rle_decode_u32

benches/rle.rs

+1%

4.5 µs4.5 µs

unpack_single_16_from_3

benches/bitpacking.rs

14.2 µs14.2 µs

throughput_compress

benches/ffor.rs

824.1 µs824.1 µs

rle_throughput_encode_32

benches/rle.rs

7.4 ms7.4 ms

transpose_u16

benches/transpose.rs

10.8 µs10.8 µs

throughput_decompress

benches/bitpacking.rs

1.2 ms1.2 ms

delta_throughput_compress

benches/delta.rs

804.7 µs804.7 µs

rle_throughput_decode_32

benches/rle.rs

4.8 ms4.8 ms

throughput_decompress_unchecked_separate_reference

benches/ffor.rs

1.4 ms1.4 ms

throughput_decompress_separate_reference

benches/ffor.rs

1.4 ms1.4 ms

throughput_decompress_unchecked

benches/ffor.rs

1.3 ms1.3 ms

throughput_compress

benches/bitpacking.rs

1.3 ms1.3 ms

throughput_decompress

benches/ffor.rs

1.2 ms1.2 ms

delta_throughput_decompress

benches/delta.rs

1.2 ms1.2 ms

rle_encode_u32

benches/rle.rs

-1%

5.6 µs5.6 µs

pack_16_to_3_heap

benches/bitpacking.rs

-3%

1.8 µs1.8 µs

delta_u16_unfused

benches/delta.rs

-4%

4.9 µs5.1 µs

delta_u16_fused

benches/delta.rs

-7%

3.3 µs3.5 µs

Commits

Click on a commit to change the comparison range

Base

develop

81e9c70

-23.76%

clear up safety documentation Signed-off-by: Connor Tsui <connor.tsui20@gmail.com>

fb498f7

2 months ago

by connortsui20

Home Terms Privacy Docs