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Click on a commit to change the comparison rangefeat(ecmascript): add ARM64 FJCVTZS instruction optimization for ToInt32 with function-specific target features and runtime detection (#12823)
This PR ports the ARM64 FJCVTZS instruction optimization from Boa's JavaScript engine to improve ToInt32 conversion performance on ARM64 architectures using function-specific target features and runtime detection.
## Key Features
**Hardware-Accelerated Conversion**: Uses the `FJCVTZS` (Floating-point Javascript Convert to Signed fixed-point, rounding toward Zero) instruction on supported ARM64 systems for optimal performance.
**Function-Specific Target Features**: Uses `#[target_feature(enable = "jsconv")]` on the ARM64 optimization function following Rust's recommended approach for dynamic CPU feature detection, providing better safety guarantees than global compilation flags.
**Optimized Feature Detection**:
- **macOS ARM64**: Direct hardware acceleration without runtime detection overhead since macOS ARM64 always supports `jsconv`
- **Other ARM64 platforms**: Runtime feature detection using `std::arch::is_aarch64_feature_detected!("jsconv")` with built-in caching to prevent "Illegal instruction" errors on older ARM64 processors
**Automatic Fallback**: Seamlessly falls back to the generic implementation on:
- Non-ARM64 architectures
- ARM64 systems without JSCVT support (ARM v8.0-A through v8.2-A)
**ARM64 CI Validation**: Added `ubuntu-24.04-arm` runner to validate the optimization on actual ARM64 hardware and ensure proper feature detection across different ARM64 processor generations.
## Implementation Details
The FJCVTZS instruction is specifically designed for ECMAScript's ToInt32 operation and is available on ARM v8.3-A processors and later. The implementation:
- Uses function-specific `#[target_feature(enable = "jsconv")]` for precise control and safety
- Maintains exact ECMAScript ToInt32 compliance with proper unsafe block usage
- Includes proper NaN handling to prevent floating-point exceptions
- Provides comprehensive test coverage for edge cases and implementation consistency
- Validated on both x86_64 and ARM64 architectures through CI
## Performance Impact
- **macOS ARM64**: Maximum performance with direct hardware acceleration, zero runtime detection overhead
- **ARM v8.3-A and later (non-macOS)**: Significant performance improvement through dedicated hardware instruction with one-time feature detection
- **ARM v8.0-A through v8.2-A**: No performance impact, uses existing generic implementation
- **Other architectures**: Zero overhead, existing behavior preserved
## Compatibility
✅ Full API compatibility - no breaking changes
✅ Safe across all ARM64 processor generations
✅ Automatic architecture detection and dispatch
✅ Comprehensive test coverage including consistency validation
✅ ARM64 CI validation on actual hardware
✅ No additional dependencies required
✅ Function-specific target feature configuration following Rust best practices
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