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Suggested base runs: Benchmarks
sse_i8_argmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_longscalar_u8_argmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_longsse_i8_argminmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_longsse_u8_argmin
benches/bench_u8.rs::benches::argminmax_u8_random_array_longavx2_u8_argminmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_longsse_u8_argmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_longscalar_i8_argminmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_longavx2_u8_argmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_longscalar_u16_argmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_longavx2_i8_argmin
benches/bench_i8.rs::benches::argminmax_i8_random_array_longscalar_i8_argmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_longimpl_u8_argminmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_longsse_i8_argmin
benches/bench_i8.rs::benches::argminmax_i8_random_array_longscalar_i8_argmin
benches/bench_i8.rs::benches::argminmax_i8_random_array_longimpl_u8_argmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_longsse_u16_argminmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_longsse_u8_argminmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_longscalar_u16_argminmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_longimpl_u8_argmin
benches/bench_u8.rs::benches::argminmax_u8_random_array_longavx2_i8_argminmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_longavx2_i8_argmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_longsse_u16_argmin
benches/bench_u16.rs::benches::argminmax_u16_random_array_longscalar_u16_argmin
benches/bench_u16.rs::benches::argminmax_u16_random_array_longscalar_f64_argmin_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_longscalar_f64_argminmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_longavx2_u16_argmin
benches/bench_u16.rs::benches::argminmax_u16_random_array_longimpl_u16_argminmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_longsse_u16_argmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_longavx2_u8_argmin
benches/bench_u8.rs::benches::argminmax_u8_random_array_longsse_f64_argminmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_longavx2_u16_argmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_longscalar_f64_argmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_longimpl_u16_argmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_longsse_u32_argminmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_longimpl_u16_argmin
benches/bench_u16.rs::benches::argminmax_u16_random_array_longsse_u32_argmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_longscalar_u32_argmin
benches/bench_u32.rs::benches::argminmax_u32_random_array_longsse_f64_argmin_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_longimpl_u32_argmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_longsse_u32_argmin
benches/bench_u32.rs::benches::argminmax_u32_random_array_longavx2_u32_argmin
benches/bench_u32.rs::benches::argminmax_u32_random_array_longavx2_f64_argminmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_longimpl_i8_argmin
benches/bench_i8.rs::benches::argminmax_i8_random_array_longimpl_f64_argminmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_longimpl_f64_argmin_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_longsse_f64_argmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_longimpl_f64_argmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_longscalar_u32_argminmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_longimpl_i8_argminmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_longavx2_f64_argmin_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_longavx2_u16_argminmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_longscalar_i16_argmin
benches/bench_i16.rs::benches::argminmax_i16_random_array_longavx2_u32_argminmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_longimpl_u32_argminmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_longavx2_u32_argmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_longimpl_i8_argmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_longsse_f32_argmin_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_longscalar_i16_argminmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_longscalar_f32_argmin_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_longavx_f32_argminmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_longavx2_f64_argmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_longimpl_f32_argmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_longsse_f32_argminmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_longavx2_i16_argminmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_longscalar_f32_argminmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_longsse_i16_argminmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_longscalar_u32_argmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_longscalar_f32_argmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_longimpl_f32_argminmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_longavx_f32_argmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_longavx_f32_argmin_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_longscalar_i16_argmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_longimpl_f32_argmin_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_longscalar_f16_argmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_longavx2_i16_argmin
benches/bench_i16.rs::benches::argminmax_i16_random_array_longsse_i16_argmin
benches/bench_i16.rs::benches::argminmax_i16_random_array_longscalar_f16_argminmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_longavx2_i16_argmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_longavx2_f16_argmin_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_longavx2_f16_argmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_longscalar_f16_argmin_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_longsse_i16_argmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_longscalar_u8_argmin
benches/bench_u8.rs::benches::argminmax_u8_random_array_longscalar_u8_argminmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_longimpl_u32_argmin
benches/bench_u32.rs::benches::argminmax_u32_random_array_longsse_i32_argmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_longscalar_f16_argminmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_longsse_f32_argmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_longimpl_i16_argmin
benches/bench_i16.rs::benches::argminmax_i16_random_array_longsse_f16_argminmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_longscalar_f16_argmin_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_longimpl_i16_argmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_longimpl_f16_argmin_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_longscalar_f16_argmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_longsse_f16_argmin_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_longsse_f16_argminmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_longavx2_f16_argminmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_longscalar_i32_argminmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_longimpl_i16_argminmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_longscalar_u64_argmin
benches/bench_u64.rs::benches::argminmax_u64_random_array_longimpl_f16_argminmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_longsse_f16_argmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_longsse_i32_argminmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_longscalar_i32_argmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_longimpl_u64_argmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_longscalar_i32_argmin
benches/bench_i32.rs::benches::argminmax_i32_random_array_longimpl_i32_argminmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_longimpl_f16_argmin_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_longsse_f16_argmin_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_longscalar_u64_argminmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_longimpl_f16_argmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_longsse_f16_argmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_longavx2_i32_argminmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_longavx2_f16_argmin_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_longimpl_f16_argminmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_longavx2_i32_argmin
benches/bench_i32.rs::benches::argminmax_i32_random_array_longsse_u64_argminmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_longimpl_f16_argmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_longscalar_u64_argmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_longsse_u64_argmin
benches/bench_u64.rs::benches::argminmax_u64_random_array_longavx2_f16_argminmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_longavx2_f16_argmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_longimpl_i32_argmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_longavx2_u64_argminmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_longsse_i32_argmin
benches/bench_i32.rs::benches::argminmax_i32_random_array_longimpl_i32_argmin
benches/bench_i32.rs::benches::argminmax_i32_random_array_longavx2_i32_argmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_longscalar_f64_argmin_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_longavx2_u64_argmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_longimpl_u64_argminmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_longsse_u64_argmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_longscalar_f64_argmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_longsse_i64_argmin
benches/bench_i64.rs::benches::argminmax_i64_random_array_longscalar_i64_argmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_longscalar_f64_argminmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_longavx2_u64_argmin
benches/bench_u64.rs::benches::argminmax_u64_random_array_longavx_f64_argmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_longsse_f64_argmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_longavx_f64_argminmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_longavx_f64_argmin_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_longimpl_u64_argmin
benches/bench_u64.rs::benches::argminmax_u64_random_array_longimpl_f64_argminmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_longscalar_f32_argminmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_longsse_f64_argmin_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_longsse_f64_argminmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_longsse_f32_argminmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_longscalar_f32_argmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_longsse_f32_argmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_longavx2_i64_argmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_longavx2_f32_argmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_longscalar_i64_argmin
benches/bench_i64.rs::benches::argminmax_i64_random_array_longimpl_f64_argmin_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_longimpl_i64_argminmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_longimpl_i64_argmin
benches/bench_i64.rs::benches::argminmax_i64_random_array_longscalar_f32_argmin_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_longavx2_i64_argminmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_longsse_f32_argmin_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_longsse_i64_argminmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_longavx2_f32_argminmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_longimpl_f32_argmin_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_longimpl_i64_argmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_longavx2_f32_argmin_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_longimpl_f32_argminmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_longavx2_i64_argmin
benches/bench_i64.rs::benches::argminmax_i64_random_array_longimpl_f32_argmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_longsse_i64_argmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_longscalar_i64_argminmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_longimpl_f64_argmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long© 2025 CodSpeed Technology