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Suggested base runs: Benchmarks
scalar_f64_argmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::scalar_f64_argmax_rnscalar_f64_argmin_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::scalar_f64_argmin_rnscalar_f64_argminmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::scalar_f64_argminmax_rnsse_f64_argmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::sse_f64_argmax_rnavx2_f64_argminmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::avx2_f64_argminmax_rnavx2_f64_argmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::avx2_f64_argmax_rnimpl_f64_argminmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::impl_f64_argminmax_rnscalar_f64_argminmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::scalar_f64_argminmax_inimpl_f64_argmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::impl_f64_argmax_rnsse_f64_argmin_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::sse_f64_argmin_rnsse_f64_argminmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::sse_f64_argminmax_insse_f64_argminmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::sse_f64_argminmax_rnavx2_f64_argmin_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::avx2_f64_argmin_rnavx_f64_argmin_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::avx_f64_argmin_inscalar_f64_argmin_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::scalar_f64_argmin_insse_f64_argmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::sse_f64_argmax_inimpl_f64_argmin_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::impl_f64_argmin_rnimpl_f64_argminmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::impl_f64_argminmax_insse_f64_argmin_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::sse_f64_argmin_inscalar_f64_argmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::scalar_f64_argmax_inscalar_u64_argmin
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::scalar_u64_argminavx_f64_argmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::avx_f64_argmax_inavx_f64_argminmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::avx_f64_argminmax_inimpl_f64_argmin_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::impl_f64_argmin_inimpl_f64_argmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::impl_f64_argmax_inscalar_u64_argmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::scalar_u64_argmaxscalar_u64_argminmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::scalar_u64_argminmaximpl_u64_argminmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::impl_u64_argminmaxsse_u64_argmin
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::sse_u64_argminsse_u64_argminmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::sse_u64_argminmaxavx_f32_argmin_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::avx_f32_argmin_insse_f32_argmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::sse_f32_argmax_insse_f32_argmin_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::sse_f32_argmin_insse_u64_argmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::sse_u64_argmaxavx2_u64_argmin
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::avx2_u64_argminavx2_u64_argminmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::avx2_u64_argminmaxavx_f32_argmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::avx_f32_argmax_inimpl_f32_argmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::impl_f32_argmax_inimpl_u64_argmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::impl_u64_argmaxscalar_f32_argmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::scalar_f32_argmax_inimpl_f32_argmin_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::impl_f32_argmin_inavx2_u64_argmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::avx2_u64_argmaxavx_f32_argminmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::avx_f32_argminmax_inscalar_f16_argmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::scalar_f16_argmax_inimpl_f32_argminmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::impl_f32_argminmax_inscalar_f16_argmin_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::scalar_f16_argmin_inscalar_f32_argmin_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::scalar_f32_argmin_insse_f16_argmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::sse_f16_argmax_insse_f32_argminmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::sse_f32_argminmax_inavx2_f16_argmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::avx2_f16_argmax_insse_f16_argmin_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::sse_f16_argmin_inavx2_f16_argmin_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::avx2_f16_argmin_inscalar_f16_argminmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::scalar_f16_argminmax_inavx2_u8_argminmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::avx2_u8_argminmaxsse_f32_argminmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::sse_f32_argminmax_rnsse_f16_argminmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::sse_f16_argminmax_inimpl_f16_argmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::impl_f16_argmax_inimpl_u8_argmin
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::impl_u8_argminscalar_f32_argminmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::scalar_f32_argminmax_rnsse_u8_argmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::sse_u8_argmaximpl_u8_argmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::impl_u8_argmaximpl_u64_argmin
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::impl_u64_argminimpl_f16_argminmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::impl_f16_argminmax_insse_f32_argmin_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::sse_f32_argmin_rnavx2_f32_argminmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::avx2_f32_argminmax_rnavx2_u8_argmin
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::avx2_u8_argminscalar_f32_argmin_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::scalar_f32_argmin_rnsse_f32_argmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::sse_f32_argmax_rnscalar_i32_argmin
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::scalar_i32_argminavx2_i32_argmin
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::avx2_i32_argminavx2_u8_argmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::avx2_u8_argmaxsse_i32_argminmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::sse_i32_argminmaxscalar_i32_argminmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::scalar_i32_argminmaxavx2_i32_argmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::avx2_i32_argmaxsse_i32_argmin
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::sse_i32_argminscalar_i32_argmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::scalar_i32_argmaxavx2_f16_argminmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::avx2_f16_argminmax_insse_i32_argmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::sse_i32_argmaxscalar_f32_argmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::scalar_f32_argmax_rnimpl_u8_argminmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::impl_u8_argminmaximpl_f32_argminmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::impl_f32_argminmax_rnimpl_f32_argmin_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::impl_f32_argmin_rnscalar_f32_argminmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::scalar_f32_argminmax_inavx2_f32_argmin_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::avx2_f32_argmin_rnavx2_f32_argmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::avx2_f32_argmax_rnimpl_f32_argmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::impl_f32_argmax_rnscalar_u32_argmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::scalar_u32_argmaximpl_i32_argmin
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::impl_i32_argminavx2_u32_argmin
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::avx2_u32_argminimpl_f16_argmin_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::impl_f16_argmin_inscalar_i16_argmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::scalar_i16_argmaxavx2_u32_argmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::avx2_u32_argmaxscalar_u32_argmin
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::scalar_u32_argminscalar_i16_argminmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::scalar_i16_argminmaxscalar_u32_argminmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::scalar_u32_argminmaxscalar_i16_argmin
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::scalar_i16_argminimpl_i32_argmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::impl_i32_argmaxsse_i16_argmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::sse_i16_argmaxsse_u32_argmin
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::sse_u32_argminsse_i16_argminmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::sse_i16_argminmaxavx2_i16_argminmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::avx2_i16_argminmaximpl_i32_argminmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::impl_i32_argminmaxsse_i16_argmin
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::sse_i16_argminavx2_u32_argminmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::avx2_u32_argminmaxsse_u32_argminmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::sse_u32_argminmaxsse_u32_argmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::sse_u32_argmaximpl_i16_argmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::impl_i16_argmaximpl_u32_argmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::impl_u32_argmaximpl_u32_argmin
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::impl_u32_argminimpl_i16_argmin
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::impl_i16_argminscalar_i8_argmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::scalar_i8_argmaxavx2_i16_argmin
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::avx2_i16_argminscalar_f16_argminmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::scalar_f16_argminmax_rnavx2_i16_argmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::avx2_i16_argmaxsse_i8_argmin
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::sse_i8_argminavx2_i32_argminmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::avx2_i32_argminmaxsse_f16_argminmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::sse_f16_argminmax_rnsse_i8_argminmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::sse_i8_argminmaximpl_u32_argminmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::impl_u32_argminmaxscalar_i8_argmin
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::scalar_i8_argminsse_f16_argmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::sse_f16_argmax_rnavx2_f16_argmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::avx2_f16_argmax_rnsse_i8_argmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::sse_i8_argmaxscalar_f16_argmin_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::scalar_f16_argmin_rnavx2_f16_argmin_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::avx2_f16_argmin_rnimpl_i16_argminmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::impl_i16_argminmaxscalar_u16_argminmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::scalar_u16_argminmaxscalar_f16_argmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::scalar_f16_argmax_rnimpl_i8_argminmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::impl_i8_argminmaximpl_f16_argmin_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::impl_f16_argmin_rnscalar_i64_argminmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::scalar_i64_argminmaximpl_f16_argmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::impl_f16_argmax_rnscalar_i8_argminmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::scalar_i8_argminmaxscalar_u16_argmin
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::scalar_u16_argminavx2_u16_argminmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::avx2_u16_argminmaxsse_f16_argmin_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::sse_f16_argmin_rnavx2_i8_argminmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::avx2_i8_argminmaxavx2_i8_argmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::avx2_i8_argmaxsse_i64_argminmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::sse_i64_argminmaxscalar_i64_argmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::scalar_i64_argmaxsse_u16_argminmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::sse_u16_argminmaximpl_i8_argmin
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::impl_i8_argminavx2_f16_argminmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::avx2_f16_argminmax_rnavx2_i8_argmin
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::avx2_i8_argminsse_u16_argmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::sse_u16_argmaximpl_f16_argminmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::impl_f16_argminmax_rnavx2_u16_argmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::avx2_u16_argmaxsse_i64_argmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::sse_i64_argmaxscalar_u16_argmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::scalar_u16_argmaximpl_i8_argmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::impl_i8_argmaximpl_i64_argmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::impl_i64_argmaximpl_u16_argmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::impl_u16_argmaxsse_u16_argmin
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::sse_u16_argminsse_i64_argmin
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::sse_i64_argminavx2_u16_argmin
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::avx2_u16_argminavx2_i64_argmin
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::avx2_i64_argminimpl_i64_argmin
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::impl_i64_argminscalar_u8_argmin
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::scalar_u8_argminsse_u8_argminmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::sse_u8_argminmaxscalar_i64_argmin
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::scalar_i64_argminimpl_i64_argminmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::impl_i64_argminmaxavx2_i64_argmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::avx2_i64_argmaximpl_u16_argmin
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::impl_u16_argminscalar_u8_argmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::scalar_u8_argmaxavx2_i64_argminmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::avx2_i64_argminmaxscalar_u8_argminmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::scalar_u8_argminmaxsse_u8_argmin
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::sse_u8_argminimpl_u16_argminmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::impl_u16_argminmax© 2024 CodSpeed Technology