Instrumentation
5 months ago da5bd5e mainCompare
Suggested base runs: Benchmarks
scalar_u16_argminmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::scalar_u16_argminmaxsse_u16_argminmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::sse_u16_argminmaxsse_u16_argmin
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::sse_u16_argminscalar_u16_argmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::scalar_u16_argmaxsse_u16_argmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::sse_u16_argmaxsse_f64_argmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::sse_f64_argmax_inavx2_u16_argmin
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::avx2_u16_argminscalar_f64_argmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::scalar_f64_argmax_inimpl_u16_argmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::impl_u16_argmaxscalar_u16_argmin
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::scalar_u16_argminavx2_u16_argminmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::avx2_u16_argminmaxavx_f64_argmin_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::avx_f64_argmin_inscalar_f64_argmin_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::scalar_f64_argmin_inimpl_u16_argmin
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::impl_u16_argminavx_f64_argmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::avx_f64_argmax_inscalar_u64_argmin
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::scalar_u64_argminsse_f64_argminmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::sse_f64_argminmax_insse_u64_argmin
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::sse_u64_argminimpl_f64_argmin_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::impl_f64_argmin_inimpl_f64_argminmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::impl_f64_argminmax_insse_f64_argmin_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::sse_f64_argmin_inavx_f64_argminmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::avx_f64_argminmax_inavx2_u64_argminmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::avx2_u64_argminmaxavx2_u16_argmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::avx2_u16_argmaxsse_u32_argmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::sse_u32_argmaximpl_u64_argminmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::impl_u64_argminmaxavx2_u64_argmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::avx2_u64_argmaximpl_u16_argminmax
benches/bench_u16.rs::benches::argminmax_u16_random_array_long::impl_u16_argminmaxscalar_u64_argminmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::scalar_u64_argminmaxsse_u32_argminmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::sse_u32_argminmaxscalar_u64_argmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::scalar_u64_argmaxavx2_u32_argmin
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::avx2_u32_argminscalar_u32_argmin
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::scalar_u32_argminsse_u32_argmin
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::sse_u32_argminavx2_u32_argmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::avx2_u32_argmaxavx2_f32_argmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::avx2_f32_argmax_rnavx2_u64_argmin
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::avx2_u64_argminscalar_f32_argminmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::scalar_f32_argminmax_rnimpl_f64_argmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::impl_f64_argmax_inimpl_u64_argmin
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::impl_u64_argminsse_f32_argmin_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::sse_f32_argmin_rnimpl_u32_argmin
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::impl_u32_argminimpl_u32_argminmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::impl_u32_argminmaximpl_u64_argmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::impl_u64_argmaxsse_f32_argmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::sse_f32_argmax_rnavx2_u32_argminmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::avx2_u32_argminmaxscalar_u32_argminmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::scalar_u32_argminmaximpl_u32_argmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::impl_u32_argmaximpl_f32_argminmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::impl_f32_argminmax_rnsse_f32_argminmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::sse_f32_argminmax_rnimpl_f32_argmin_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::impl_f32_argmin_rnscalar_f64_argminmax_in
benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::scalar_f64_argminmax_inavx2_f16_argminmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::avx2_f16_argminmax_inscalar_f32_argmin_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::scalar_f32_argmin_rnavx2_f32_argminmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::avx2_f32_argminmax_rnscalar_u32_argmax
benches/bench_u32.rs::benches::argminmax_u32_random_array_long::scalar_u32_argmaximpl_u8_argminmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::impl_u8_argminmaxscalar_f32_argmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::scalar_f32_argmax_rnsse_u8_argmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::sse_u8_argmaxavx2_f32_argmin_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::avx2_f32_argmin_rnavx2_u8_argmin
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::avx2_u8_argminimpl_u8_argmin
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::impl_u8_argminsse_u8_argminmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::sse_u8_argminmaxsse_u64_argminmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::sse_u64_argminmaxavx2_u8_argminmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::avx2_u8_argminmaxsse_u8_argmin
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::sse_u8_argminimpl_u8_argmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::impl_u8_argmaxsse_f16_argminmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::sse_f16_argminmax_inscalar_f16_argmin_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::scalar_f16_argmin_insse_f16_argmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::sse_f16_argmax_inscalar_i16_argmin
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::scalar_i16_argminavx2_u8_argmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::avx2_u8_argmaximpl_f16_argminmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::impl_f16_argminmax_inscalar_f16_argminmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::scalar_f16_argminmax_insse_i16_argminmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::sse_i16_argminmaxavx2_f16_argmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::avx2_f16_argmax_insse_i16_argmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::sse_i16_argmaxscalar_u8_argminmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::scalar_u8_argminmaxscalar_u8_argmax
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::scalar_u8_argmaxsse_f16_argmin_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::sse_f16_argmin_inimpl_i16_argmin
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::impl_i16_argminimpl_f32_argmax_rn
benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::impl_f32_argmax_rnavx2_i16_argminmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::avx2_i16_argminmaxavx2_f64_argminmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::avx2_f64_argminmax_rnimpl_i16_argmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::impl_i16_argmaxscalar_f16_argmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::scalar_f16_argmax_inavx2_i16_argmin
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::avx2_i16_argminsse_u64_argmax
benches/bench_u64.rs::benches::argminmax_u64_random_array_long::sse_u64_argmaxsse_i16_argmin
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::sse_i16_argminsse_f64_argminmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::sse_f64_argminmax_rnavx2_f16_argmin_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::avx2_f16_argmin_inscalar_u8_argmin
benches/bench_u8.rs::benches::argminmax_u8_random_array_long::scalar_u8_argminsse_i32_argmin
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::sse_i32_argminsse_f64_argmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::sse_f64_argmax_rnavx2_i16_argmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::avx2_i16_argmaxscalar_i32_argminmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::scalar_i32_argminmaxsse_i32_argminmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::sse_i32_argminmaximpl_i16_argminmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::impl_i16_argminmaximpl_i32_argminmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::impl_i32_argminmaxscalar_i32_argmin
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::scalar_i32_argminimpl_f64_argmin_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::impl_f64_argmin_rnimpl_f16_argmax_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::impl_f16_argmax_inscalar_f64_argmin_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::scalar_f64_argmin_rnavx2_i32_argmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::avx2_i32_argmaxscalar_i16_argminmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::scalar_i16_argminmaximpl_f64_argmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::impl_f64_argmax_rnimpl_f16_argmin_in
benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::impl_f16_argmin_inimpl_f64_argminmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::impl_f64_argminmax_rnscalar_f64_argmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::scalar_f64_argmax_rnscalar_f16_argmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::scalar_f16_argmax_rnavx2_i32_argminmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::avx2_i32_argminmaxavx2_f64_argmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::avx2_f64_argmax_rnscalar_i16_argmax
benches/bench_i16.rs::benches::argminmax_i16_random_array_long::scalar_i16_argmaxscalar_f16_argminmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::scalar_f16_argminmax_rnsse_i64_argmin
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::sse_i64_argminavx2_f64_argmin_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::avx2_f64_argmin_rnimpl_i32_argmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::impl_i32_argmaxsse_i32_argmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::sse_i32_argmaxsse_f16_argminmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::sse_f16_argminmax_rnsse_f64_argmin_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::sse_f64_argmin_rnimpl_f16_argmin_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::impl_f16_argmin_rnavx2_f16_argmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::avx2_f16_argmax_rnsse_f16_argmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::sse_f16_argmax_rnimpl_f16_argminmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::impl_f16_argminmax_rnscalar_i32_argmax
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::scalar_i32_argmaxavx2_f16_argmin_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::avx2_f16_argmin_rnavx2_i32_argmin
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::avx2_i32_argminavx2_f16_argminmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::avx2_f16_argminmax_rnimpl_i64_argmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::impl_i64_argmaxscalar_f16_argmin_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::scalar_f16_argmin_rnimpl_i32_argmin
benches/bench_i32.rs::benches::argminmax_i32_random_array_long::impl_i32_argminavx2_i64_argminmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::avx2_i64_argminmaximpl_i64_argminmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::impl_i64_argminmaxavx2_i64_argmin
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::avx2_i64_argminsse_i64_argminmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::sse_i64_argminmaximpl_f16_argmax_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::impl_f16_argmax_rnscalar_i64_argminmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::scalar_i64_argminmaxsse_i64_argmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::sse_i64_argmaximpl_i8_argminmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::impl_i8_argminmaxavx2_i64_argmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::avx2_i64_argmaxavx2_i8_argmin
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::avx2_i8_argminscalar_i64_argmin
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::scalar_i64_argminsse_f16_argmin_rn
benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::sse_f16_argmin_rnimpl_i8_argmin
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::impl_i8_argminsse_i8_argminmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::sse_i8_argminmaxavx_f32_argmin_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::avx_f32_argmin_insse_f32_argmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::sse_f32_argmax_inscalar_i8_argmin
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::scalar_i8_argminscalar_f32_argminmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::scalar_f32_argminmax_inscalar_f32_argmin_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::scalar_f32_argmin_insse_i8_argmin
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::sse_i8_argminimpl_i64_argmin
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::impl_i64_argminimpl_f32_argmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::impl_f32_argmax_inscalar_f32_argmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::scalar_f32_argmax_inimpl_i8_argmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::impl_i8_argmaximpl_f32_argminmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::impl_f32_argminmax_insse_i8_argmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::sse_i8_argmaxscalar_i8_argmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::scalar_i8_argmaxscalar_i64_argmax
benches/bench_i64.rs::benches::argminmax_i64_random_array_long::scalar_i64_argmaxavx2_i8_argminmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::avx2_i8_argminmaxsse_f32_argmin_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::sse_f32_argmin_inscalar_f64_argminmax_rn
benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::scalar_f64_argminmax_rnavx_f32_argminmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::avx_f32_argminmax_inavx_f32_argmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::avx_f32_argmax_inscalar_i8_argminmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::scalar_i8_argminmaximpl_f32_argmin_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::impl_f32_argmin_insse_f32_argminmax_in
benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::sse_f32_argminmax_inavx2_i8_argmax
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::avx2_i8_argmax© 2025 CodSpeed Technology