QOL improvements(#17)
MergedBenchmarks
Passed
benches/bench_f16.rs::benches::minmax_f16_random_array_long::avx2_random_long_f16 benches/bench_u16.rs::benches::minmax_u16_random_array_long::impl_random_long_u16 benches/bench_f16.rs::benches::minmax_f16_random_array_long::impl_random_long_f16 benches/bench_u16.rs::benches::minmax_u16_random_array_long::sse_random_long_u16 benches/bench_i16.rs::benches::minmax_i16_random_array_long::sse_random_long_i16 benches/bench_i8.rs::benches::minmax_i8_random_array_long::sse_random_long_i8 benches/bench_i8.rs::benches::minmax_i8_random_array_long::impl_random_long_i8 benches/bench_u16.rs::benches::minmax_u16_random_array_long::avx2_random_long_u16 benches/bench_f16.rs::benches::minmax_f16_random_array_long::sse_random_long_f16 benches/bench_f64.rs::benches::minmax_f64_random_array_long::avx_random_long_f64 benches/bench_u16.rs::benches::minmax_u16_random_array_long::scalar_random_long_u16 benches/bench_u32.rs::benches::minmax_u32_random_array_long::avx2_random_long_u32 benches/bench_f32.rs::benches::minmax_f32_random_array_long::impl_random_long_f32 benches/bench_i32.rs::benches::minmax_i32_random_array_long::sse_random_long_i32 benches/bench_u32.rs::benches::minmax_u32_random_array_long::sse_random_long_u32 benches/bench_i64.rs::benches::minmax_i64_random_array_long::scalar_random_long_i64 benches/bench_i8.rs::benches::minmax_i8_random_array_long::scalar_random_long_i8 benches/bench_f32.rs::benches::minmax_f32_random_array_long::scalar_random_long_f32 benches/bench_f64.rs::benches::minmax_f64_random_array_long::impl_random_long_f64 benches/bench_u64.rs::benches::minmax_u64_random_array_long::impl_random_long_u64 benches/bench_f64.rs::benches::minmax_f64_random_array_long::scalar_random_long_f64 benches/bench_u64.rs::benches::minmax_u64_random_array_long::scalar_random_long_u64 benches/bench_f32.rs::benches::minmax_f32_random_array_long::avx_random_long_f32 benches/bench_i64.rs::benches::minmax_i64_random_array_long::impl_random_long_i64 benches/bench_i16.rs::benches::minmax_i16_random_array_long::avx2_random_long_i16 benches/bench_i32.rs::benches::minmax_i32_random_array_long::avx2_random_long_i32 benches/bench_i64.rs::benches::minmax_i64_random_array_long::sse_random_long_i64 benches/bench_i32.rs::benches::minmax_i32_random_array_long::scalar_random_long_i32 benches/bench_u64.rs::benches::minmax_u64_random_array_long::sse_random_long_u64 benches/bench_f64.rs::benches::minmax_f64_random_array_long::sse_random_long_f64 benches/bench_f16.rs::benches::minmax_f16_random_array_long::scalar_random_long_f16 benches/bench_u64.rs::benches::minmax_u64_random_array_long::avx2_random_long_u64 benches/bench_u32.rs::benches::minmax_u32_random_array_long::scalar_random_long_u32 benches/bench_u8.rs::benches::minmax_u8_random_array_long::scalar_random_long_u8 benches/bench_f32.rs::benches::minmax_f32_random_array_long::sse_random_long_f32 benches/bench_i64.rs::benches::minmax_i64_random_array_long::avx2_random_long_i64 benches/bench_u32.rs::benches::minmax_u32_random_array_long::impl_random_long_u32 benches/bench_i32.rs::benches::minmax_i32_random_array_long::impl_random_long_i32 benches/bench_i16.rs::benches::minmax_i16_random_array_long::scalar_random_long_i16 benches/bench_u8.rs::benches::minmax_u8_random_array_long::sse_random_long_u8 benches/bench_i8.rs::benches::minmax_i8_random_array_long::avx2_random_long_i8 benches/bench_u8.rs::benches::minmax_u8_random_array_long::avx2_random_long_u8 benches/bench_i16.rs::benches::minmax_i16_random_array_long::impl_random_long_i16 benches/bench_u8.rs::benches::minmax_u8_random_array_long::impl_random_long_u8 Commits
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