ci: update codspeed-criterion dependency(#67)
MergedBenchmarks
Passed
benches/bench_i8.rs::benches::argminmax_i8_random_array_long::avx2_i8_argmax benches/bench_u8.rs::benches::argminmax_u8_random_array_long::avx2_u8_argmax benches/bench_i16.rs::benches::argminmax_i16_random_array_long::avx2_i16_argminmax benches/bench_i16.rs::benches::argminmax_i16_random_array_long::impl_i16_argmax benches/bench_u8.rs::benches::argminmax_u8_random_array_long::impl_u8_argmin benches/bench_u8.rs::benches::argminmax_u8_random_array_long::sse_u8_argmax benches/bench_i8.rs::benches::argminmax_i8_random_array_long::avx2_i8_argminmax benches/bench_u8.rs::benches::argminmax_u8_random_array_long::avx2_u8_argminmax benches/bench_i8.rs::benches::argminmax_i8_random_array_long::impl_i8_argminmax benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::sse_f32_argminmax_in benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::sse_f32_argmax_rn benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::sse_f32_argmin_rn benches/bench_i16.rs::benches::argminmax_i16_random_array_long::avx2_i16_argmax benches/bench_u16.rs::benches::argminmax_u16_random_array_long::avx2_u16_argmax benches/bench_u16.rs::benches::argminmax_u16_random_array_long::impl_u16_argmin benches/bench_i16.rs::benches::argminmax_i16_random_array_long::impl_i16_argminmax benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::sse_f32_argmin_in benches/bench_i16.rs::benches::argminmax_i16_random_array_long::sse_i16_argmin benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::impl_f16_argmax_rn benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::sse_f16_argmax_in benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::sse_f32_argminmax_rn benches/bench_u64.rs::benches::argminmax_u64_random_array_long::sse_u64_argmax benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::impl_f32_argmax_in benches/bench_i64.rs::benches::argminmax_i64_random_array_long::avx2_i64_argmin benches/bench_u64.rs::benches::argminmax_u64_random_array_long::avx2_u64_argmax benches/bench_u64.rs::benches::argminmax_u64_random_array_long::impl_u64_argmax benches/bench_u8.rs::benches::argminmax_u8_random_array_long::scalar_u8_argmax benches/bench_i8.rs::benches::argminmax_i8_random_array_long::scalar_i8_argmin benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::impl_f32_argminmax_in benches/bench_u64.rs::benches::argminmax_u64_random_array_long::sse_u64_argmin benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::scalar_f32_argmax_rn benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::scalar_f32_argmin_rn benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::sse_f64_argminmax_rn benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::scalar_f64_argmax_rn benches/bench_u32.rs::benches::argminmax_u32_random_array_long::scalar_u32_argmax benches/bench_i64.rs::benches::argminmax_i64_random_array_long::avx2_i64_argmax benches/bench_i64.rs::benches::argminmax_i64_random_array_long::impl_i64_argmax benches/bench_i64.rs::benches::argminmax_i64_random_array_long::impl_i64_argmin benches/bench_i64.rs::benches::argminmax_i64_random_array_long::avx2_i64_argminmax benches/bench_u64.rs::benches::argminmax_u64_random_array_long::avx2_u64_argminmax benches/bench_u64.rs::benches::argminmax_u64_random_array_long::scalar_u64_argmin benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::scalar_f32_argminmax_rn benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::sse_f64_argminmax_in benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::scalar_f64_argmin_in benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::scalar_f16_argminmax_rn benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::sse_f64_argmin_rn benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::sse_f64_argmax_rn benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::scalar_f64_argminmax_in benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::scalar_f64_argmin_rn benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::scalar_f64_argminmax_rn benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::scalar_f32_argminmax_in benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::scalar_f32_argmin_in benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::avx_f32_argmax_in benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::avx_f32_argmin_in benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::scalar_f32_argmax_in benches/bench_i64.rs::benches::argminmax_i64_random_array_long::impl_i64_argminmax benches/bench_u64.rs::benches::argminmax_u64_random_array_long::avx2_u64_argmin benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::avx2_f16_argmax_in benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::avx2_f16_argmin_in benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::impl_f16_argmax_in benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::impl_f16_argmin_in benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::scalar_f16_argmax_in benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::sse_f16_argmin_in benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::sse_f16_argminmax_in benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::scalar_f16_argmin_rn benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::avx_f64_argmin_in benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::impl_f64_argmin_in benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::sse_f64_argmin_in benches/bench_i16.rs::benches::argminmax_i16_random_array_long::scalar_i16_argmax benches/bench_i16.rs::benches::argminmax_i16_random_array_long::scalar_i16_argmin benches/bench_i16.rs::benches::argminmax_i16_random_array_long::sse_i16_argmax benches/bench_i16.rs::benches::argminmax_i16_random_array_long::sse_i16_argminmax benches/bench_i64.rs::benches::argminmax_i64_random_array_long::scalar_i64_argmax benches/bench_i64.rs::benches::argminmax_i64_random_array_long::scalar_i64_argmin benches/bench_i64.rs::benches::argminmax_i64_random_array_long::sse_i64_argminmax benches/bench_i8.rs::benches::argminmax_i8_random_array_long::sse_i8_argminmax benches/bench_u16.rs::benches::argminmax_u16_random_array_long::impl_u16_argmax benches/bench_u16.rs::benches::argminmax_u16_random_array_long::scalar_u16_argmin benches/bench_u32.rs::benches::argminmax_u32_random_array_long::avx2_u32_argmax benches/bench_u32.rs::benches::argminmax_u32_random_array_long::avx2_u32_argminmax benches/bench_u32.rs::benches::argminmax_u32_random_array_long::impl_u32_argmax benches/bench_u32.rs::benches::argminmax_u32_random_array_long::impl_u32_argmin benches/bench_u32.rs::benches::argminmax_u32_random_array_long::impl_u32_argminmax benches/bench_u32.rs::benches::argminmax_u32_random_array_long::scalar_u32_argmin benches/bench_u32.rs::benches::argminmax_u32_random_array_long::sse_u32_argmax benches/bench_u32.rs::benches::argminmax_u32_random_array_long::sse_u32_argminmax benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::scalar_f16_argminmax_in benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::impl_f64_argmax_in benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::avx_f64_argmax_in benches/bench_u64.rs::benches::argminmax_u64_random_array_long::scalar_u64_argmax benches/bench_i32.rs::benches::argminmax_i32_random_array_long::impl_i32_argminmax benches/bench_i32.rs::benches::argminmax_i32_random_array_long::sse_i32_argmax benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::sse_f16_argmin_rn benches/bench_u8.rs::benches::argminmax_u8_random_array_long::avx2_u8_argmin benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::impl_f16_argmin_rn benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::impl_f16_argminmax_rn benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::avx2_f16_argmax_rn benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::scalar_f64_argmax_in benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::scalar_f16_argmax_rn benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::scalar_f16_argmin_in benches/bench_i64.rs::benches::argminmax_i64_random_array_long::sse_i64_argmin benches/bench_i64.rs::benches::argminmax_i64_random_array_long::sse_i64_argmax benches/bench_u64.rs::benches::argminmax_u64_random_array_long::impl_u64_argminmax benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::impl_f64_argminmax_in benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::avx_f64_argminmax_in benches/bench_u64.rs::benches::argminmax_u64_random_array_long::impl_u64_argmin benches/bench_i32.rs::benches::argminmax_i32_random_array_long::scalar_i32_argmax benches/bench_i32.rs::benches::argminmax_i32_random_array_long::scalar_i32_argmin benches/bench_u64.rs::benches::argminmax_u64_random_array_long::sse_u64_argminmax benches/bench_i32.rs::benches::argminmax_i32_random_array_long::sse_i32_argminmax benches/bench_u16.rs::benches::argminmax_u16_random_array_long::scalar_u16_argmax benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::sse_f32_argmax_in benches/bench_f64_ignore_nan.rs::benches::argminmax_in_f64_random_array_long::sse_f64_argmax_in benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::impl_f32_argmax_rn benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::impl_f32_argmin_rn benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::avx2_f32_argmax_rn benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::avx2_f32_argmin_rn benches/bench_i32.rs::benches::argminmax_i32_random_array_long::sse_i32_argmin benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::avx_f32_argminmax_in benches/bench_i32.rs::benches::argminmax_i32_random_array_long::impl_i32_argmax benches/bench_i32.rs::benches::argminmax_i32_random_array_long::avx2_i32_argmin benches/bench_i32.rs::benches::argminmax_i32_random_array_long::avx2_i32_argminmax benches/bench_u8.rs::benches::argminmax_u8_random_array_long::scalar_u8_argmin benches/bench_f32_ignore_nan.rs::benches::argminmax_in_f32_random_array_long::impl_f32_argmin_in benches/bench_i8.rs::benches::argminmax_i8_random_array_long::scalar_i8_argmax benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::impl_f64_argmax_rn benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::sse_f16_argmax_rn benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::sse_f16_argminmax_rn benches/bench_u16.rs::benches::argminmax_u16_random_array_long::sse_u16_argminmax benches/bench_u32.rs::benches::argminmax_u32_random_array_long::sse_u32_argmin benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::impl_f16_argminmax_in benches/bench_f16_ignore_nan.rs::benches::argminmax_in_f16_random_array_long::avx2_f16_argminmax_in benches/bench_u16.rs::benches::argminmax_u16_random_array_long::sse_u16_argmin benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::impl_f64_argmin_rn benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::avx2_f64_argmax_rn benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::avx2_f64_argminmax_rn benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::impl_f32_argminmax_rn benches/bench_f32_return_nan.rs::benches::argminmax_rn_f32_random_array_long::avx2_f32_argminmax_rn benches/bench_i32.rs::benches::argminmax_i32_random_array_long::avx2_i32_argmax benches/bench_i32.rs::benches::argminmax_i32_random_array_long::impl_i32_argmin benches/bench_u32.rs::benches::argminmax_u32_random_array_long::avx2_u32_argmin benches/bench_u16.rs::benches::argminmax_u16_random_array_long::avx2_u16_argmin benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::avx2_f16_argmin_rn benches/bench_f16_return_nan.rs::benches::argminmax_rn_f16_random_array_long::avx2_f16_argminmax_rn benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::impl_f64_argminmax_rn benches/bench_f64_return_nan.rs::benches::argminmax_rn_f64_random_array_long::avx2_f64_argmin_rn benches/bench_i8.rs::benches::argminmax_i8_random_array_long::impl_i8_argmin benches/bench_u8.rs::benches::argminmax_u8_random_array_long::impl_u8_argmax benches/bench_i8.rs::benches::argminmax_i8_random_array_long::sse_i8_argmin benches/bench_u8.rs::benches::argminmax_u8_random_array_long::sse_u8_argmin benches/bench_u16.rs::benches::argminmax_u16_random_array_long::sse_u16_argmax benches/bench_i8.rs::benches::argminmax_i8_random_array_long::avx2_i8_argmin benches/bench_u16.rs::benches::argminmax_u16_random_array_long::avx2_u16_argminmax benches/bench_i16.rs::benches::argminmax_i16_random_array_long::impl_i16_argmin benches/bench_i16.rs::benches::argminmax_i16_random_array_long::avx2_i16_argmin benches/bench_u8.rs::benches::argminmax_u8_random_array_long::sse_u8_argminmax benches/bench_i8.rs::benches::argminmax_i8_random_array_long::impl_i8_argmax benches/bench_i8.rs::benches::argminmax_i8_random_array_long::sse_i8_argmax benches/bench_u16.rs::benches::argminmax_u16_random_array_long::impl_u16_argminmax benches/bench_u8.rs::benches::argminmax_u8_random_array_long::impl_u8_argminmax scalar_u64_argminmaxRegression benches/bench_u64.rs::benches::argminmax_u64_random_array_long::scalar_u64_argminmaxscalar_i64_argminmaxRegression benches/bench_i64.rs::benches::argminmax_i64_random_array_long::scalar_i64_argminmaxscalar_i32_argminmaxRegression benches/bench_i32.rs::benches::argminmax_i32_random_array_long::scalar_i32_argminmaxscalar_u32_argminmaxRegression benches/bench_u32.rs::benches::argminmax_u32_random_array_long::scalar_u32_argminmaxscalar_i8_argminmaxRegression benches/bench_i8.rs::benches::argminmax_i8_random_array_long::scalar_i8_argminmaxscalar_u8_argminmaxRegression benches/bench_u8.rs::benches::argminmax_u8_random_array_long::scalar_u8_argminmaxscalar_u16_argminmaxRegression benches/bench_u16.rs::benches::argminmax_u16_random_array_long::scalar_u16_argminmaxscalar_i16_argminmaxRegression benches/bench_i16.rs::benches::argminmax_i16_random_array_long::scalar_i16_argminmaxCommits
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